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Computer Laboratory Computer Architecture Group Meeting

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The Computer Architecture Group meets on an ad hoc basis to discuss developments in computer architecture, typically operating as a seminar when we have visiting speakers.

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If you have a question about this list, please contact: Prof Simon Moore; Robert Mullins; Timothy M Jones; Robert Watson; Tobias Grosser. If you have a question about a specific talk, click on that talk to find its organiser.

0 upcoming talks and 122 talks in the archive.

Automated Reasoning at AWS, and Applications in Cryptography

Note unusual time

UserRod Chapman, Senior Principal Applied Scientist at AWS.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 20 November 2024, 11:00-12:00

lc985's list

Cambridge Compiler Social Talks

UserMarkus Böck, Jeff Niu.

HouseComputer Laboratory, William Gates Building, LT1.

ClockTuesday 03 September 2024, 15:00-16:00

Modern Multi-Level Partitioning for Block-Based IC Design and Machine Learning

User Christos Sotiriou, University of Thessaly.

HouseComputer Lab, FW11.

ClockMonday 24 June 2024, 13:30-14:30

Modern Multi-Level Partitioning for Block-Based IC Design and Machine Learning

User Christos Sotiriou, University of Thessaly.

HouseComputer Lab, FW11.

ClockMonday 24 June 2024, 13:30-14:30

Kanagawa: How Wavefront Threading Enables Effective High-Level Synthesis

https://www.microsoft.com/en-us/research/people/dlo/

UserDaniel Lo, Microsoft Research.

HouseLecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD.

ClockFriday 21 June 2024, 11:00-12:00

mb2663's list

Hyperblock Scheduling for Verified High-Level Synthesis

UserYann Herklotz (École Polytechnique Fédérale de Lausanne).

HouseLT1, Computer Laboratory, William Gates Builiding, West Cambridge site.

ClockWednesday 19 June 2024, 15:00-16:00

For ML and With ML: The New Normal in System Design

UserLizy Kurian John, UT Austin.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 24 May 2024, 11:00-12:00

Compiler and Architectural Support for Whole-System Persistence

UserChanghee Jung, Purdue University.

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 28 March 2024, 11:00-12:00

lc985's list

Democratizing Data Science by Leveraging Structure

UserAmir Shaikhha.

HouseRoom SS03, Computer Laboratory, William Gates Building.

ClockFriday 22 March 2024, 11:00-12:00

Optimization Methods for Accelerator Mapping and Hardware Design Space Exploration

UserGrace Dinh, Unversity of Berkley.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 08 March 2024, 13:00-14:00

Representing Data Collections for Analysis and Transformation

UserTommy McMichen, Northwestern University.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 08 March 2024, 10:45-11:45

OptiWISE: Combining Sampling and Instrumentation for Granular CPI Analysis

UserYuxin Guo, University of Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockTuesday 27 February 2024, 12:00-13:00

Compiler Testing with Relaxed Memory Models with L. Geeson

UserLuke Geeson.

HouseSN08, Computer Laboratory, William Gates Building.

ClockTuesday 20 February 2024, 17:00-18:00

Wednesday Seminars - Department of Computer Science and Technology

The Compilation Game: Unifying AI, Hardware Design, Quantum, Climate Modelling, and Verification

UserDr Tobias Grosser - Department of Computer Science and Technology, University of Cambridge.

HouseLecture Theatre 1, Computer Laboratory, William Gates Building.

ClockWednesday 07 February 2024, 15:05-15:55

tcg40's list

Visual, Interactive, and Explainable Human-AI Collaboration

UserMenna El-Assady.

HouseComputer Laboratory, William Gates Building, LT2.

ClockWednesday 24 January 2024, 16:00-17:00

Unlocking the Power of Data-Centric Acceleration for Modern Applications

UserHaiyu Mao, ETH Zurich.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 10 November 2023, 15:00-16:00

Modern Cache Prefetching and Page Size Aware Cache Prefetching

Note unusual time

UserTexas A&M.

HouseLecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD.

ClockWednesday 13 September 2023, 13:30-14:30

SQuadS: Self-Serve System Services for new Hardware-Software Cooperation

UserNazerke Turtayeva, UC Santa Barbara.

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 07 September 2023, 13:00-14:00

Hardware for Machine Learning

Tenstorrent - building AI/ML accelerators

UserThaddeus Fortenberry, Ali Ziadi and Luke Yen.

HouseLT2, Computer Laboratory, William Gates Building.

ClockTuesday 01 August 2023, 10:00-12:00

Wally: Bridging he CPU Education-Implementation Gap

Note unusual time

UserProf. David Harris, Harvey Mudd College.

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 22 June 2023, 11:00-12:00

Synthesizing Accelerators for FPGAs the Functional Way

UserChristophe Dubach (McGill University).

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 01 June 2023, 14:00-15:00

Rivos Founder's Talk: Why RIsc-V? Why Open Source? Why is Architecture back?

Note unusual time and location

UserDr Mark Hayter.

HouseLecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD.

ClockThursday 12 January 2023, 15:00-16:00

Fast and Efficient Deployment of Security Defenses via Microcode Customization

Note unusual time and location

UserProf Ashish Venkat, University of Virginia.

HouseSS03, Computer Laboratory, William Gates Building.

ClockMonday 11 November 2019, 09:30-10:30

The new clang constant interpreter

UserNandor Licker (University of Cambridge).

HouseGS15, Computer Laboratory.

ClockWednesday 16 October 2019, 11:00-12:00

Making Python Fast: Using Hardware-Software Co-design to Address Inefficiencies in Dynamic Language Runtimes

Note unusual time and venue

UserBerkin Ilbeyi, Cornell.

HouseSW01, Computer Laboratory.

ClockWednesday 20 June 2018, 11:00-12:00

Green Cache

UserErik Hagersten, Uppsala University.

HouseFW26, Computer Laboratory, William Gates Building.

ClockThursday 26 April 2018, 14:00-15:00

Directed Speculation in Multi-core Memory Systems to Improve Performance and Efficiency

UserDr. Paul V. Gratz.

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 24 April 2018, 14:00-15:00

Intra-Core Loop-Task Accelerators for Task-Based Parallel Programs

Note unusual time

UserDr . Christopher Batten, ECE, Cornell University (visiting scholar in Cambridge).

HouseFW11, Computer Laboratory.

ClockThursday 19 April 2018, 14:00-15:00

Computer Laboratory Programming Research Group Seminar

Energy Efficient Compilation of Irregular Task-Parallel Loops

UserKrishna Nandivada, IIT Madras, India.

HouseGS15.

ClockThursday 25 January 2018, 14:00-15:00

Redundancy in Deep Neural Networks and Its Impacts to Hardware Accelerator Design

UserJiang Su, Imperial College London.

HouseSW01, Computer Laboratory.

ClockMonday 24 July 2017, 11:00-12:00

rdm34's list

The Biomaker Challenge: an introduction

UserJenny Molloy, Department of Plant Sciences.

HouseComputer Laboratory, room SS03.

ClockTuesday 13 June 2017, 12:00-12:30

Energy-Quality Scalable Adaptive VLSI Circuits and Systems – The Way towards the Next 10X Energy Reduction

Note unusual time

UserProf. Massimo Alioto, National University of Singapore.

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 09 May 2017, 14:00-15:00

Processors for the Data Center and Cloud of the Future

UserDavid Wentzalff, Princeton University.

HouseFW11, Computer Laboratory.

ClockFriday 05 May 2017, 10:00-11:00

Computer Laboratory Digital Technology Group (DTG) Meetings

The Next-Generation Vector Architecture for HPC

UserMbou Eyole, ARM.

HouseSS03, Computer Laboratory, William Gates Building.

ClockMonday 30 January 2017, 14:05-14:55

The Future of Computer Architecture

UserGavin Stark, Visiting Fellow, Computer Laboratory.

HouseSW01, Computer Laboratory.

ClockTuesday 29 November 2016, 15:00-16:30

FPGA Implementations of High-bandwidth and Low-Latency Machine Learning based on Online Kernel Methods

UserProf Philip Leong, University of Sydney.

HouseSS03, Computer Laboratory, William Gates Building.

ClockMonday 28 November 2016, 15:00-16:30

Computer Laboratory Programming Research Group Seminar

Automatic Identification and Parallelisation of General Reduction Operations

UserPhilip Ginsbach, University of Edinburgh.

HouseSS03.

ClockWednesday 23 November 2016, 15:15-16:15

Design for Security Test against Fault Injection Attack, and Fast Test with Compressive Sensing

Note unusual time and venue. Talk follows 14:00 to 14:45 talk.

UserProf Huiyun Li, Shenzhen Institutes of Advanced Technology.

HouseLecture Theatre 1, Computer Laboratory.

ClockTuesday 02 August 2016, 14:45-15:30

Barrier-Aware Warp Scheduling for Throughput Processors

Note unusual time

UserProf Yu Zhibin, Shenzhen Institutes of Advanced Technology.

HouseLecture Theatre 1, Computer Laboratory.

ClockTuesday 02 August 2016, 14:00-14:45

OpenPiton

UserJonathan Balkind, Princeton University.

HouseFW11, Computer Laboratory.

ClockThursday 30 June 2016, 11:00-12:00

The CAVA Computer: Exceptional Parallelism and Energy Efficiency

Note unusual time and venue

UserDr Peter Hsu.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockThursday 23 July 2015, 11:30-12:30

Harder, Better, Faster, Stronger - Elliptic Curve Discrete Logarithm Computations on FPGAs

UserErich Wenger, Graz University of Technology, Austria.

HouseSC04, Computer Laboratory, William Gates Building.

ClockMonday 20 April 2015, 10:00-11:00

Neural simulation on diverse computational hardware

UserDr Dan Goodman, Imperial.

HouseSS03, Computer Laboratory, William Gates Building.

ClockMonday 09 February 2015, 14:00-15:00

PSLP: Padded SLP Automatic Vectorization

UserVasileios Porpodas, University of Cambridge.

HouseFW11, Computer Laboratory.

ClockWednesday 04 February 2015, 11:00-12:00

Bringing computer vision to the masses

UserDavid Moloney, CTO Movidius.

HouseSW01, Computer Laboratory.

ClockTuesday 02 December 2014, 10:00-11:00

Raising Computational Throughput and Energy Efficiency by Synthesizing Software into FPGA Hardware

Note unusual time and venue

UserProf Jason Anderson, University of Toronto.

HouseSS03, Computer Laboratory, William Gates Building.

ClockMonday 10 November 2014, 15:00-16:00

USB Type-C: How hard is it to pick two resistors?

Note unusual time and venue

UserDr Mark Hayter, Google consumer hardware.

HouseLecture Theatre 1, Computer Laboratory.

ClockFriday 07 November 2014, 12:00-13:00

RISC-V: A Free and Open Instruction Set Architecture

UserKrste Asanovic, University of California, Berkeley.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockThursday 09 October 2014, 16:00-17:00

Randomised testing of a microprocessor model using SMT-solver state generation

Note unusual time

UserDr Brian Campbell, Edinburgh.

HouseSC04, Computer Laboratory, William Gates Building.

ClockTuesday 16 September 2014, 11:00-12:00

Virtual Prototyping, Virtual Platforms, and System Simulation for Embedded System and Software Development

UserJay Yantchev, CEO, ASTC and VLAB Works.

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 18 February 2014, 14:00-15:00

The New Cambridge Phenomenon?

UserJason Fitzpatrick, Centre for Computing History.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockMonday 27 January 2014, 15:00-16:00

Scale-Out Processors

UserBoris Grot, University of Edinburgh.

HouseFW11, Computer Laboratory.

ClockTuesday 08 October 2013, 12:00-13:00

Energy Efficient Computing System - Research in NICS CAD Tsinghua

Note unusual time

UserProf Yu Wang, Tsinghua University.

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 30 July 2013, 14:00-15:00

Synopsys Processor Designer - Introduction and demonstration

Note unusual time and venue

UserJeroen Dobbelaere, Synopsys.

HouseFW11, Computer Laboratory.

ClockThursday 18 July 2013, 13:00-14:45

Adaptive Resolution of Information Flow Constraints

Note unusual time and venue

UserSantanu Dash, University of Hertfordshire.

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 04 June 2013, 14:45-15:30

Exposing Fine-grain Concurrency in Sequential code with a Dataflow Compiler IR

Note unusual time and venue

UserAli Mustafa Zaidi (University of Cambridge).

HouseSS03, Computer Laboratory.

ClockTuesday 04 June 2013, 14:00-14:45

FUSEing PolyBlaze: enabling heterogeneous multicore research

Note unusual time

UserProf. Lesley Shannon.

HouseSS03, Computer Laboratory.

ClockTuesday 16 April 2013, 11:00-12:00

Architecture Support for Accelerator-Center Architectures

UserProf Jason Cong.

HouseSS03, Computer Laboratory.

ClockWednesday 11 July 2012, 11:00-12:00

HDL Code Generation from MATLAB and Simulink

Note unusual location

UserJon Fielder and Scott Wilson, MathWorks.

HouseSS03, Computer Laboratory.

ClockWednesday 21 March 2012, 11:00-12:00

System-Level Management of Hybrid Accelerators

Note unusual time

UserProf. Katherine Compton, University of Wisconsin.

HouseSC04, Computer Laboratory, William Gates Building.

ClockThursday 15 March 2012, 11:30-12:30

ON-CHIP DEBUG SUPPORT TO ADDRESS COMPLEXITY IN MULTIPE PROCESSOR SYSTEMS-ON-CHIP

UserProf Klaus McDonald-Maier, UltraSOC.

HouseSC04, Computer Laboratory, William Gates Building.

ClockWednesday 07 December 2011, 11:00-12:00

Device Mechanism: Rethinking Driver Development

Note unusual day

UserRaul Fajardo.

HouseSC04, Computer Laboratory, William Gates Building.

ClockTuesday 06 December 2011, 11:00-12:00

Communication Challenges for Extreme-Scale, Real-Time Neural Network Simulation

UserPaul Fox and Steve Marsh, University of Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockWednesday 16 November 2011, 11:00-12:00

Software lock elision for x86 machine code

UserAmitabha Roy.

HouseSC04, Computer Laboratory, William Gates Building.

ClockWednesday 26 October 2011, 11:00-12:00

Introducing the Computer Architecture Group

New meeting time

UserEverybody!.

HouseSC04, Computer Laboratory, William Gates Building.

ClockWednesday 12 October 2011, 11:00-12:00

Experiences Creating Chromebook

Note unusual time

UserMark Hayter, Manager of Chromebook Hardware, Google.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockFriday 12 August 2011, 14:30-15:30

Threads, caches and networks in CMP systems

Note unusual time

UserProf. Avinoam Kolodny, Technion, Israel.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockTuesday 19 July 2011, 14:30-15:30

Verification of Microarchitectural Refinements in Rule-based Systems

Note unusual time and location

UserDr Nirav Dave, MIT but heading to SRI.

HouseSS03, Computer Laboratory.

ClockMonday 18 July 2011, 11:00-12:00

Hardware Protection for Trusted Software

Note unusual time

UserProf. Ruby Lee, Princeton University.

HouseSS03, Computer Laboratory.

ClockFriday 15 July 2011, 15:00-16:00

An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes

UserMasahiro Fujita, University of Tokyo.

HouseFW26, Computer Laboratory.

ClockWednesday 13 July 2011, 15:00-16:00

Implementation of ISE for the micro-threaded model in LEON3 SPARC

Note unusual time and location

UserDr Martin Danek, UTIA Prague.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockTuesday 28 June 2011, 11:00-12:30

The Foundations of Apple-CORE:- DRISC, Microthreading and SVP

Note unusual time and location

UserChris Jesshope, University of Amsterdam.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockTuesday 28 June 2011, 10:00-10:50

Using Processor Hardware Counters in Picking the Optimal Work-Stealing Policy

UserMilos Puzovic, University of Cambridge.

HouseFW26, Computer Laboratory.

ClockFriday 24 June 2011, 16:00-17:00

RISC Instructions for Capability Acceleration

UserJonathan Woodruff.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 10 June 2011, 16:00-17:00

LiquidMetal: a unified programming language and runtime for heterogeneous platforms

UserChristophe Dubach, University of Edinburgh.

HouseSC04, Computer Laboratory, William Gates Building.

ClockThursday 09 June 2011, 11:30-12:30

Spatial Computation

UserAli Mustafa Zaidi, Computer Laboratory.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 03 June 2011, 16:00-17:00

Kiwi HLS (high-level synthesis) - C# programs with FPGA acceleration

UserDavid Greaves, University of Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 27 May 2011, 16:00-17:00

Stream Chaining: Exploiting Multiple Levels of Correlation in Data Prefetching

UserMarcelo Cintra.

HouseLecture Theatre 1, Computer Laboratory, William Gates Building.

ClockThursday 26 May 2011, 11:00-12:00

The Berkeley Parallel Computing Laboratory

UserKrste Asanovic, UC Berkeley.

HouseRoom FW26, Computer Laboratory, William Gates Building.

ClockWednesday 18 May 2011, 10:00-11:00

Link-Time Optimization for Instruction Cache Power Efficiency

UserTimothy Jones.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 13 May 2011, 16:00-17:00

Field programmable parallel computing in signal and image processing - is application development too hard and what can be done about it?

Note unusual time

UserDavid Kearney, University of South Australia.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockThursday 21 April 2011, 14:15-15:15

Steps Towards a Flexible Manycore Fabric

UserDaniel Bates, Alex Bradbury, Andreas Koltes and Robert Mullins.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 11 March 2011, 16:00-17:00

Short-Read DNA Sequence Alignment with Custom Designed FPGA-based Hardware

UserAdam Hall, University of Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 04 March 2011, 16:00-17:00

Low Power Photonic Networks for Shared Memory Computers

UserPhilip Watts ( University of Cambridge).

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 25 February 2011, 16:00-17:00

Time-Driven Switching: Principles and Implementation

UserYury Adzevich, University of Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 18 February 2011, 16:00-17:00

Predictive Models for Microarchitectural Adaptation

UserDr Timothy Jones, University of Cambridge Computer Lab..

HouseSC04, Computer Laboratory, William Gates Building.

ClockFriday 04 February 2011, 16:00-17:00

Building an 18 core ARM chip multiprocessor for neuronal simulation

Room changed, Note unusual time

UserProf Steve Furber.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockThursday 20 January 2011, 14:15-15:15

The RLOC is Dead -- Long Live the RLOC

UserSatnam Singh, Microsoft Research Cambridge.

HouseSC04, Computer Laboratory, William Gates Building.

ClockTuesday 23 November 2010, 11:00-12:00

Welcome meeting

UserSimon Moore.

HouseSC04, Computer Laboratory, William Gates Building.

ClockTuesday 12 October 2010, 11:00-12:00

Concurrency and Communication: Lessons from the SHIM Project

(Re-run of talk given at MSR two weeks ago)

UserStephen A. Edwards, Columbia University.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 06 August 2010, 14:00-15:00

Enabling Runtime Monitoring on Multicores for Performance and Reliability

UserVijayanand Nagarajan.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 09 June 2010, 16:30-17:30

Accelerator: A data-parallel DSL for programming heterogonous systems

UserSatnam Singh, Microsoft Research.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 13 January 2010, 16:30-17:30

Massively Parallel Processor Array: an FPGA Replacement?

UserProf Guy Lemieux, University of British Columbia.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 11 November 2009, 16:30-17:30

Computer System Emulation using Multiple FPGAs

UserPhil Watts.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 04 November 2009, 16:30-17:30

PWRficient Techniques for Today & Questions for Tomorrow

Note unusual time

UserMark Hayter, P.A. Semi.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockFriday 21 August 2009, 14:00-15:00

A Photonic Chip-to-chip Network for C3D

UserPhilip Watts.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 03 June 2009, 16:15-17:15

A Communication Characterization of Splash-2 and Parsec

UserChris Fensch and Nick Barrow-Williams.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 27 May 2009, 16:15-17:15

Flow-Aware Allocation for On-Chip Networks

Note unusual time and venue

UserArnab Banerjee.

HouseRoom FW26, Computer Laboratory, William Gates Building.

ClockThursday 07 May 2009, 11:00-12:00

Parallel External Memory Model for Multicore Architectures

UserNodari Sitchinava, University of California, Irvine.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 17 April 2009, 16:15-17:15

FPGA's NoC Freedom: You bought it, so why not use it

Note unusual time and day

UserProf Lesley Shannon, Simon Fraser University.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 13 February 2009, 15:00-16:00

Optical Interconnect - Tutorial and Initial Thoughts

UserPhil Watts, Computer Lab..

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 19 November 2008, 16:15-17:15

Design, Compilation and Runtime Solutions for Energy-Efficient Microprocessors

Please note unusual venue, date and time

UserTimothy Jones, University of Edinburgh.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockMonday 13 October 2008, 14:00-15:00

Hardware multithreading

UserDr Simon Moore.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 08 October 2008, 16:15-17:15

BEE3: Revitalizing Computer Architecture Research

Note unusual time and location

UserChuck Thacker, Microsoft Research Silicon Valley.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockMonday 06 October 2008, 14:00-15:00

Two generations of Many-Core Computational Arrays

Note unusual time

UserBevan Baas, UC Davis.

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 25 September 2008, 16:00-17:00

G: A high-level packet processing language with a high-speed FPGA-based implementation

Note unusual day and time

UserGordon Brebner, Xilinx Research Labs.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 05 September 2008, 14:00-15:00

Combining Scratch-Pad Placement with Loop Parallelisation for FPGAs

UserGeorge Constantinides.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 11 June 2008, 16:15-17:15

Map-reduce as a Programming Model for Custom Computing Machines

Note unusual time

UserPhilip Leong, The Chinese University of Hong Kong.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 23 May 2008, 14:15-15:15

Xilinx ChipScope Tutorial

Note - originally this was to be on 16th April, but it has been postponed until 30th April

UserSaar Drimer.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 30 April 2008, 16:15-17:15

The next resource war: computation vs. communication

Note unusual time

UserSimon Moore & Dan Greenfield, Computer Lab..

HouseSS03, Computer Laboratory, William Gates Building.

ClockTuesday 25 March 2008, 16:00-17:00

Synchronisation Mechanisms - A Tutorial

UserChris Fensch, Computer Lab.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 12 March 2008, 16:15-17:15

Tutorial on Data Driven Computation

UserDr Simon William Moore (University of Cambridge).

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 05 March 2008, 16:15-17:15

System Modeling and Dynamic Reconfiguration in Xilinx Research

Note unusual time

UserAdam Donlin, Xilinx.

HouseSS03, Computer Laboratory, William Gates Building.

ClockFriday 22 February 2008, 14:00-15:00

High-Performance Processing with Field-Programmable Logic

Note unusual time and place

UserGeorge Constantinides, Imperial College London.

HouseLecture Theatre 1, Computer Laboratory, William Gates Building.

ClockWednesday 20 February 2008, 14:15-15:15

Hardware defences against side channel and invasive attacks

UserPhilip Paul, Computer Lab, University of Cambridge.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 13 February 2008, 16:15-17:15

Programmable Logic Core Based Post-Silicon Debug For SoCs

Note unusual time

UserSteve Wilton, Associate Professor, University of British Columbia.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 13 February 2008, 11:00-12:00

Reading group: Revisiting the Sequential Programming Model for the Multicore Era

Note unusual time

UserSpeaker to be confirmed.

HouseSS03, Computer Laboratory, William Gates Building.

ClockWednesday 06 February 2008, 16:15-17:15

Designing Circuits with Parallel Programs

last hardwrae discussion of the year

UserSatnam Singh, Microsoft Research Cambridge.

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 13 December 2007, 16:00-17:00

All day seminar: Parallel Computing Everywhere

Special one day meeting

UserKeynote: Prof Steve Furber.

HouseLecture Theatre 1, Computer Laboratory, William Gates Building.

ClockThursday 06 December 2007, 09:00-17:30

IET/BCS talk: The Internet - Where it came from & where it is going

IET/BCS evening talk

UserRoger Scantlebury (Consultant), Paul Shreve (Cisco).

HouseLecture Theatre 1, Computer Laboratory, William Gates Building.

ClockThursday 15 November 2007, 19:00-20:30

Design for device variability in nano CMOS

UserDr Simon William Moore (University of Cambridge).

HouseSS03, Computer Laboratory, William Gates Building.

ClockThursday 01 November 2007, 15:30-16:30

Communicating Process Architecture for Multicores

UserProf David May: Bristol University and Xmos.

HouseLecture Theatre 2, Computer Laboratory, William Gates Building.

ClockThursday 02 August 2007, 14:15-15:15

Please see above for contact details for this list.

Other lists

MedSIN talks Churchill Undergraduate Physics Seminars quantitative history seminar

Other talks

Protein Folding, Evolution and Interactions Symposium Graph Convolutional Networks for Natural Language Processing and Relational Modeling Group covariance functions for Gaussian process metamodels with categorical inputs Enhancing the Brain and Wellbeing in Health and Disease Are hospital admissions for people with palliative care needs avoidable and unwanted? A transmissible RNA pathway in honeybees ***PLEASE NOTE THIS SEMINAR IS CANCELLED*** The role of the oculomotor system in visual attention and visual short-term memory "Mechanosensitive regulation of cancer epigenetics and pluripotency"
 

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