A Photonic Chip-to-chip Network for C3D

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• Philip Watts
• Wednesday 03 June 2009, 16:15-17:15
• SS03, Computer Laboratory, William Gates Building.

If you have a question about this talk, please contact Prof Simon Moore.

The talk will summarise the recent technological developments which enable viable chip-to-chip networks: silicon photonics and 3D/SiP integration. Next, the constraints imposed by photonic networking, in particular the lack of buffers will be discussed. Finally, work on an initial cross-bar network model for C3D (to compare with electronic alternatives) will be described.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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