Wally: Bridging he CPU Education-Implementation Gap

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• Prof. David Harris, Harvey Mudd College
• Thursday 22 June 2023, 11:00-12:00
• SS03, Computer Laboratory, William Gates Building.

If you have a question about this talk, please contact Prof Simon Moore.

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RISC -V is a free and open computer architecture rapidly gaining market share across industry and academia. Our team has developed Wally, a configurable RISC -V processor capable of scaling from a tiny embedded processor to a fully-featured application processor capable of booting Linux on an FPGA and in simulation. Wally is described in SystemVerilog and synthesizes for both ASIC and FPGA targets. We are developing a companion textbook teaching computer architecture by emphasizing both the general principles and the specific Wally implementation. We believe this is the first time a textbook fully explores all of the implementation issues needed in a real system-on-chip, from interrupts to caches to branch prediction to floating-point to bus interfaces to pipeline hazards to verification to benchmarking. Wally is open-source supported by the OpenHW Group (https://github.com/openhwgroup/cvw). We hope it becomes a platform for research and education in computer architecture.

Prof. David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. from Stanford and his S.B. and M.Eng. degrees from MIT . David has designed microprocessors at Intel, Hewlett-Packard, Sun Microsystems, and elsewhere. His research interests include microprocessors, high-speed and low-power circuit design, and computer arithmetic. He also has led teams of students building experimental aircraft, and writes Southern California hiking guidebooks.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

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