COOKIES: By using this website you agree that we can place Google Analytics Cookies on your device for performance monitoring. |
University of Cambridge > Talks.cam > Computer Laboratory Systems Research Group Seminar > A Runtime System for Software Lock Elision
A Runtime System for Software Lock ElisionAdd to your list(s) Download to your calendar using vCal
If you have a question about this talk, please contact Eiko Yoneki. The advent of multi-core processors means that exploiting parallelism is key to increasing the performance of programs. Many researchers have studied the use of atomic blocks as a way to simplify the construction of scalable parallel programs. However, there is a large body of existing lock-based code, and typically it is incorrect to simply replace lock-based critical sections with atomic blocks. Some problems include the need to do IO within critical sections; the use of primitives such as condition variables; and the sometime reliance on underlying lock properties such as fairness or priority inheritance. In this talk I will present an alternative: a software runtime system that allows threads to speculatively execute lock-based critical sections in parallel. Execution proceeds optimistically, dynamically detecting conflicts between accesses by concurrent threads. However, if there are frequent conflicts, or if there are attempts to perform operations that cannot be done speculatively, then execution can fall back to acquiring a lock. The runtime system has been designed with the requirements of systems code in mind: in particular it does not require that programs be written in type-safe languages, nor does it require any form of garbage collection. Furthermore, it never requires a thread to block at any point other than a held lock, thereby retaining locking semantics that are familiar to programmers. Bio: I am a second year PhD student in the Systems Research Group at the Computer Laboratory. I am supervised by Steven Hand from the lab and Tim Harris from Microsoft Research. Prior to this I have worked on memory consistency verification and performance modeling at Intel. I received my masters degree in computer science at the Indian Institute of Science, Bangalore. This talk is part of the Computer Laboratory Systems Research Group Seminar series. This talk is included in these lists:
Note that ex-directory lists are not shown. |
Other listsElectron Microscopy Group Seminars Special panel discussion Interesting talks- 1st tryOther talksKnot Floer homology and algebraic methods Future directions panel Bank credit rating changes, capital structure adjustments and lending Chains and Invisible Threads: Marx on Republican Liberty and Domination Malaria’s Time Keeping Fundamental Limits to Volcanic Cooling and its Implications for Past Climate on Earth Direct measurements of dynamic granular compaction at the mesoscale using synchrotron X-ray radiography Cambridge Rare Disease Summit 2017 EU LIFE Lecture - "Histone Chaperones Maintain Cell Fates and Antagonize Reprogramming in C. elegans and Human Cells" Coatable photovoltaics (Title t o be confirmed) Symplectic topology of K3 surfaces via mirror symmetry |