University of Cambridge > > Computer Laboratory Systems Research Group Seminar > IX: A Protected Dataplane Operating System for High Throughput and Low Latency

IX: A Protected Dataplane Operating System for High Throughput and Low Latency

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The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and microsecond-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. We present IX, a dataplane operating system that provides high I/O performance, while maintaining the key advantage of strong protection offered by existing kernels. IX uses hardware virtualization to separate management and scheduling functions of the kernel (control plane) from network processing (dataplane). The dataplane architecture builds upon a native, zero-copy API and optimizes for both bandwidth and latency by dedicating hardware threads and networking queues to dataplane instances, processing bounded batches of packets to completion, and by eliminating coherence traffic and multi-core synchronization. We demonstrate that IX outperforms Linux and state-of-the-art, user-space network stacks significantly in both throughput and end-to-end latency. Moreover, IX improves the throughput of a widely deployed, key-value store by up to 3.6 and reduces tail latency by more than 2.

Short Bio: I am a PhD student in the Electrical Engineering Department at Stanford University, advised by Professor Christos Kozyrakis. Before starting my studies at Stanford, I earned my Bachelor’s degree in Engineering Science at the University of Toronto. My research interests are in computer architecture and systems. Most recently, I have been focusing on disaggregated storage systems and resource management for large-scale datacentres. This summer, I am excited to be interning at Microsoft Research, working with Eno Thereska and the Systems & Networking group.

This talk is part of the Computer Laboratory Systems Research Group Seminar series.

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