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Compound Memory Models

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Today’s mobile, desktop, and server processors are heterogeneous, consisting not only of CPUs but also GPUs and other accelerators. Such heterogeneous processors are starting to expose a shared memory interface across these devices. Given that each of these individual devices typically support a distinct instruction set architecture and a distinct memory consistency model, it is not clear what the memory consistency model of the heterogeneous machine should be. In this talk, we answer this question by formalizing “compound” consistency models: we present a compositional operational model describing the resulting model when devices with distinct consistency models are fused together. We instantiate our model with the compound x86TSO/PTX model – a CPU enforcing x86TSO and a GPU enforcing the PTX model. A key result is that the x86TSO/PTX compound model retains compiler mappings from the language-based (scoped) C memory model. This means that threads mapped to the x86TSO device can continue to use the already proven C-to-x86TSO compiler mapping, and the same for PTX .

Bio: Andrés Goens received an M.Sc. degree in mathematics in 2014 from RWTH Aachen University, Aachen, Germany, and a Ph.D. (Dr.rer.nat.) degree (Hons.) in computer science from TU Dresden, Dresden, Germany, in 2021. Since 2021 he has been working as a Research Associate at the University of Edinburgh. Before that, he was at the Barkhausen Institut and the Chair for Compiler Construction, TU Dresden. His research focuses on heterogeneity and concurrency from the perspective of mathematical structures, as well as semantics in compilers, programming languages and software and hardware (co-)design.

This talk is part of the Logic and Semantics Seminar (Computer Laboratory) series.

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