University of Cambridge > > Computer Laboratory Systems Research Group Seminar > Programmable, Hardware-Based Routing and Scheduling

Programmable, Hardware-Based Routing and Scheduling

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Routing and scheduling are two of the most fundamental tasks performed by any network. Routing determines the set of paths alongside which network traffic flows, while scheduling controls how traffic flows alongside these paths.

Today, these two tasks strike different trade-offs in terms of flexibility and speed. As it runs in the control plane, in software, routing tends to be flexible… but slow. In contrast, as it runs in the data plane, most of the time in hardware, scheduling tends to be inflexible… but fast.

In this talk, I will argue that this trade-off is not fundamental thanks to the recent advent of programmable data planes. More specifically, I will first argue about offloading (some) routing tasks to the hardware, so as to make them much faster. I will then argue about making packet scheduling programmable, so as to make it much more flexible. I will illustrate each proposal with examples of our recent works including Hardware-Accelerated Control Planes [HotNets’18], Blink [NSDI’19], and SP-PIFO [NSDI’20].


Laurent Vanbever is an associate professor at ETH Z ├╝rich where he started as an assistant professor in 2015. Before that, Laurent was a postdoctoral research associate at Princeton University where he worked with Jennifer Rexford. He obtained his PhD degree in Computer Science from the University of Louvain in 2012. His research focuses on making large network infrastructures more manageable, scalable and, secure. Laurent has won several awards for his research including: the NSDI community award; the SIGCOMM best paper award and six IETF /IRTF Applied Networking Research Prizes.

This talk is part of the Computer Laboratory Systems Research Group Seminar series.

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