The development of silicon compatible processes for HEMT realisation

Add to your list(s) Download to your calendar using vCal

• Dr Menglin Cao (CAPE), University of Cambridge
• Monday 07 December 2015, 14:15-15:15
• Small Lecture Theatre, Bragg Building, Room 133, Cavendish Laboratory, Department of Physics.

If you have a question about this talk, please contact Teri Bartlett.

Compound semiconductor (III-V) devices are crucially important in a range of RF/microwave applications. High Electron Mobility Transistors (HEMTs), as the best low noise high frequency compound semiconductor devices, have been utilised in various applications at microwave and mm-wave frequencies such as communications, imaging, sensing and power. However, silicon based manufacturing will always be the heart of the semiconductor industry. III -V devices are conventionally fabricated using gold-based metallisation and lift off processes, which are incompatible with silicon manufacturing processes based on blanket metal or dielectric deposition and subtractive patterning by dry etching techniques. Therefore, the challenge is to develop silicon compatible processes for the realisation of compound semiconductor devices, whilst not compromising the device performance. In this work, silicon compatible processes for HEMT realisation have been developed, and in particular a copper-based T-gate fabricated by silicon compatible process will be presented in this presentation.

This talk is part of the Semiconductor Physics Group Seminars series.

This talk is included in these lists:

• All Cavendish Laboratory Seminars
• All Talks (aka the CURE list)
• Centre for Health Leadership and Enterprise
• Featured lists
• ME Seminar
• Neurons, Fake News, DNA and your iPhone: The Mathematics of Information
• School of Physical Sciences
• Semiconductor Physics Group Seminars
• Small Lecture Theatre, Bragg Building, Room 133, Cavendish Laboratory, Department of Physics
• Thin Film Magnetic Talks

Note that ex-directory lists are not shown.