Versatile ‘Quantum Multiplexing’ for Nanoelectronic Applications

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• Dr Luke Smith, Cavendish Laboratory, University of Cambridge
• Wednesday 27 August 2014, 14:15-15:15
• Mott Seminar Room, Cavendish Laboratory, Department of Physics.

If you have a question about this talk, please contact Teri Bartlett.

It is highly advantageous to increase the number of nanostructure devices on a single semiconductor chip, for high through-put testing.

There have been several recent advances in this area [1 – 3], motivated by the goal of creating a scalable architecture for possible quantum computing applications. We have developed an on-chip multiplexing technique which significantly increases the number of devices that can be located on a single chip. This was used to measure an array of 256 split gates on a GaAs/AlGaAs high electron mobility transistor (HEMT), during one cooldown in a Cryostat; the largest number of such devices on an individual chip to date [1].

So far, the multiplexer has been used to perform three important tests of the suitability of nanostructure devices as elements for nanoelectronic or computing architectures. These are:

i) yield analysis; ii) reproducibility of device operation on repeated cooldowns [4]; and iii) detailed statistical studies of quantum phenomenon and electrical characteristics [5]. These statistical studies focussed on the ‘0.7 structure’, an anomalous conductance feature of transport through one-dimensional systems.

Recently, a charge-locking technique has been developed which can be used to sequentially bias a large number of gates, in order to form complex device structures [6]. This has used to contact an array of quantum dots. We intend to further extend the multiplexing scheme to measure an array of 256 bar gates on a GaAs/AlGaAs HEMT , where fluctuations in the electron density across the array can be estimated from the voltage at which electrons are fully depleted from beneath each gate. The uniformity of HEM Ts is thereby characterized, to identify wafers which have a high degree of homogeneity.

[1] H. Al-Taie et al., Appl. Phys. Lett. 102, 243102 (2013). [2] D. R. Ward et al., Appl. Phys. Lett. 102, 213107 (2013). [3] J. M. Hornibrook et al., Appl. Phys. Lett. 104, 103108 (2014). [4] H. Al-Taie et al., arXiv:1407.5806. [5] L. W. Smith et al., Phys. Rev. B 90 , 045426 (2014). [6] R. K. Puddy et al., arXiv:1408.2872.

This talk is part of the Semiconductor Physics Group Seminars series.

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