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PHANTOM: A Parallel Architecture for Practical Oblivious Computation
If you have a question about this talk, please contact Laurent Simon.
Offloading computation to an untrusted datacenter can leak confidential information. Adversaries with physical access—such as a malicious datacenter employee—can probe the on-board interconnect to extract secret data from a processor. Tamper-proof computing platforms, where all code is executed within a physically sealed processor and all data outside the processor is encrypted, alleviate this problem only partially. The addresses of data that is accessed in DRAM are still visible in plain-text and represent a source of information leakage.
Our goal is to make a processor’s memory accesses “oblivious” so that adversaries see a completely obfuscated address trace, and to build an oblivious platform that is practical today. To this end, we present PHANTOM (++), an oblivious memory controller that achieves high performance by aggressively exploiting memory parallelism and employing a carefully designed stall-free architecture. We have built an FPGA -based prototype on the Convey HC-2ex heterogeneous computing platform and solve several challenges in mapping an Oblivious RAM algorithm to FPG As running at low frequencies without stalling the high bandwidth memory controllers.
(++) Parallel Hardware to make Applications Non-leaking Through Oblivious Memory
Martin Maas is a second-year PhD student at UC Berkeley, working with Krste Asanović and John Kubiatowicz. His research interests include managed languages, computer architecture and operating systems. Before coming to Berkeley, Martin received his undergraduate degree from the University of Cambridge. He is currently completing an internship with Tim Harris at Oracle Labs.
This talk is part of the Computer Laboratory Security Seminar series.
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