|COOKIES: By using this website you agree that we can place Google Analytics Cookies on your device for performance monitoring.|
Motivating Future Interconnects: A Differential Measurement Analysis of PCI Latency
If you have a question about this talk, please contact Eiko Yoneki.
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and packaging mean that further advances will require a new approach to interconnect design. Although latency in networks has been the focus of the High-Performance Computing architect and of concern across the computer community, we illustrate how an evolution in the common PCI interconnect architecture has worsened latency by a factor of between 3 and 25 over earlier incarnations.
This talk is part of the Computer Laboratory Systems Research Group Seminar series.
This talk is included in these lists:
Note that ex-directory lists are not shown.
Other listsPublicHealth@Cambridge Faith and Peace Annual Race Equality Lecture
Other talksProbing the mechanisms of learning and memory at the single-neuron level in humans Influence of mantle melting on cooling and volatile cycling A Match Made in...Middlesbrough? Migration and the Marriage Market in the Late Nineteenth Century A sting in the tail: evolutionary consequences of chemical anti-predator defence in animals Pregnancy and Childbirth: Discussing current academic research and clinical expertise to ensure a healthy pregnancy. Measurement error and the problem of quantity individuation