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New-Generation Computer Memory

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If you have a question about this talk, please contact Andrea Chlebikova.

For nearly 50 years, the factor driving the electronics revolution has been the inexorable reduction in feature sizes in silicon integrated circuits, leading to ever-larger densities of memory and CPU units. In 1971, this minimum feature size was 10 microns; the current minimum feature sizes is now ~14nm. Moore’s Law embodies this trend: ‘the number of transistors in integrated circuits doubles every two years’.

However, Moore’s Law is about to come to an end. As feature sizes reduce, electron tunnelling through insulating regions will occur, causing device malfunction. In this talk, I will discuss a new technology which can be size-scaled below the limit for Si-based devices, namely ‘phase-change random-access memory’, which will be used as a replacement for flash memory, and could even be used to create artificial synapses and non-von Neumann ‘in-memory logic’ computer architectures.

This talk is part of the ChemSoc - Cambridge Chemistry Society series.

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