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University of Cambridge > Talks.cam > Semiconductor Physics Group Seminars > (SP Wednesday Workshop) - Charge Locking Quantum Multiplexer and Triple Addressing Gate System
(SP Wednesday Workshop) - Charge Locking Quantum Multiplexer and Triple Addressing Gate SystemAdd to your list(s) Download to your calendar using vCal
If you have a question about this talk, please contact Teri Bartlett. This presentation discusses how charge can potentially be stored in quantum multiplexers. Two types of charge quantum multiplexers will be introduced, the two-way multiplexer (2wMUX)and the three-way multiplexer(3wMUX). Attempts of storing charges in the 2wMUX were not successful and the underlying reasons for it are unknown. Adding a top gate on the multiplexer increases the total capacitance of the device, in order to enhance charge stability on the multiplexer. However, the modified device experienced problems such as charge leakages to other contacts and non-responsive gate contacts. These problems are believed to be related to baking gold contacts at high temperatures. Meanwhile, UV-exposed Polyimide was found to be removable using a microwave asher. However, a brown shadow corresponding to the removed Polyimide was observed after depositing gold on that area. The exact cause for that is unknown, but it is very likely that thin layers of Polyimide got charred by the high power plasma created in the ashing process. Compared to the 2wMUX, the 3wMUX has a split gate fixed to the midpoint of each addressing lead, allowing three pathways to be addressed with only two addressing leads. The effects of split gate length L on the 2DEG were investigated. Pinch off voltage increases with decreasing L. The polarity of the DC bias voltage affects the pinch off threshold because the relative difference between the gate voltage and DC bias dictates the height of the potential barrier imposed onto the system. This talk is part of the Semiconductor Physics Group Seminars series. This talk is included in these lists:
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