University of Cambridge > > Computer Laboratory Computer Architecture Group Meeting > Kiwi HLS (high-level synthesis) - C# programs with FPGA acceleration

Kiwi HLS (high-level synthesis) - C# programs with FPGA acceleration

Add to your list(s) Download to your calendar using vCal

If you have a question about this talk, please contact Robert Mullins.

The Kiwi project aims to make reconfigurable computing technology including Field Programmable Gate Arrays (FPGAs) more accessible to mainstream programmers. FPG As have a huge potential for quickly performing many interesting computations in parallel but their exploitation by computer programmers is limited by the need to think like a hardware engineer and the need to use hardware description languages rather than conventional programming languages.

David will descripe the multi-stage compilation process used in the KiwiC compiler and report on recent work to enable DLLs from an application to be allocated to different FPGA nodes interconnected by Ethernet.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

Tell a friend about this talk:

This talk is included in these lists:

Note that ex-directory lists are not shown.


© 2006-2024, University of Cambridge. Contact Us | Help and Documentation | Privacy and Publicity