Kanagawa: How Wavefront Threading Enables Effective High-Level Synthesis

Add to your list(s) Download to your calendar using vCal

• Daniel Lo, Microsoft Research
• Friday 21 June 2024, 11:00-12:00
• Lecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD.

If you have a question about this talk, please contact Robert Mullins.

https://www.microsoft.com/en-us/research/people/dlo/

Digital systems are growing in importance and computing hardware is growing more heterogeneous. Hardware design, however, remains laborious and expensive, in part due to the limitations of conventional hardware description languages (HDLs) like VHDL and Verilog. A longstanding research goal has been programming hardware like software, with high-level languages that can generate efficient hardware designs. In this talk, we will present Kanagawa, a language that takes a new approach to combine the programmer productivity benefits of traditional High-Level Synthesis (HLS) approaches with the expressibility and hardware efficiency of Register-Transfer Level (RTL) design. The language’s concise syntax, matched with a hardware design-friendly execution model, permits a relatively simple toolchain to map high-level code into efficient hardware implementations.

This talk is part of the Computer Laboratory Computer Architecture Group Meeting series.

This talk is included in these lists:

• All Talks (aka the CURE list)
• Cambridge talks
• Computer Laboratory Computer Architecture Group Meeting
• Department of Computer Science and Technology talks and seminars
• Interested Talks
• Lecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD
• Lecture Theatre 2, Department of Computer Science & Technology, 15 JJ Thompson Avenue, Madingley Road, Cambridge, CB3 0FD
• School of Technology
• Trust & Technology Initiative - interesting events
• bld31

Note that ex-directory lists are not shown.