University of Cambridge > Talks.cam > Computer Laboratory Security Seminar > The Guardian Council: Using many-core architectures to support programmable hardware security

The Guardian Council: Using many-core architectures to support programmable hardware security

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If you have a question about this talk, please contact Alexander Vetterl.

Computer security is becoming more challenging in the face of untrusted programs and system users, and safeguards against attacks currently in use, such as buffer overflows, rowhammer, side channels and malware, are limited. Software protection schemes are often too expensive, and hardware schemes too constrained or out-of-date to be practical. We propose that the necessary solution is a hybrid: a programmable security architecture implemented on chip, using dedicated hardware channels for analysis information, and software units for entire-program dynamic analysis.

The key insight that makes this practical in a modern setting is silicon scaling trends allowing a very large amount of computation at very low power and area overheads, provided this computation can be parallelized. We therefore use a set of highly parallel, small Guardian Processing Elements as part of an architecture designed to support powerful programmable security at very low cost.

We use this system to design and evaluate implementations of a wide variety of hardware and software protection mechanisms with low power, performance and area overheads.

This talk is part of the Computer Laboratory Security Seminar series.

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