Developments in VLSI design

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• Josh Pollick, Churchill College
• Wednesday 10 March 2021, 19:30-20:00
• Online, via MS Teams.

If you have a question about this talk, please contact Matthew Ireland.

Traditionally, if we wished to make a larger chip we would simply create a bigger monolithic die. However, with Moore’s Law slowing and poor yields on larger chips, we must look to alternative solutions to continue to economically scale our chips. As chips get larger and processes get smaller, it also becomes much more difficult to create fast, efficient interconnects. This talk will introduce some techniques for building Multi Chip Modules and 3D stacked chips. We will then discuss what benefits and drawbacks these techniques have, and look at some real-world examples of them put into use.

This talk is part of the Churchill CompSci Talks series.

This talk is included in these lists:

• Churchill CompSci Talks
• Online, via MS Teams
• computer science
• se393's list

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