ARC Preview: Heterogeneous Architecture Exploration: Analysis vs Parameter Sweep

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• Asma Kahoul (Imperial College London)
• Thursday 05 March 2009, 15:00-15:30
• Mahanakorn Laboratory, EEE.

If you have a question about this talk, please contact Dr George A Constantinides.

This paper argues the case for the use of analytical models in FPGA architecture layout exploration. We show that the problem when simplified, is amenable to formal optimization techniques such as integer linear programming. However, the simplification process may lead to inaccurate models. To test the overall methodology, we combine the resulting layouts with VPR 5 .0. Our results show that the resulting architectures are better than those found using traditional parameter sweeping techniques.

This talk is part of the CAS FPGA Talks series.

This talk is included in these lists:

• CAS FPGA Talks
• Mahanakorn Laboratory, EEE

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