On Logical Masking Effects of Soft Errors

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• Prof. Sudhakar M. Reddy (University Of Iowa, USA)
• Friday 07 November 2008, 10:30-11:30
• Room 611, EEE.

If you have a question about this talk, please contact Dr George A Constantinides.

Soft errors caused by ionizing radiation are being noticed even in electronic devices operating at lower altitudes. Hardening of circuit components can be used to reduce or eliminate occurrence of errors at circuit outputs due to soft errors. Since hardening the complete circuit against soft errors may result in unacceptable area and power consumption cost, selectively hardening only a subset of the circuit nodes with the largest contribution to the soft error rate (SER) has been suggested. In this talk we will first briefly review single event transients and their contributions to soft errors and masking of the effects of transients. Next we describe a scalable method to estimate the probability of logical masking. The last part of the talk will present the results of an experiment to investigate the differences between undetectable permanent faults and transient errors.

Biography

Sudhakar M. Reddy received the undergraduate degree in electronics and communication engineering from Osmania University, Hyderabad, India, M.E. degree from the Indian Institute of Science, Bangalore, India and the Ph.D. degree in electrical engineering from the University of Iowa, Iowa City, Iowa. Since 1968, he has been a member of the faculty of the Department of Electrical and Computer Engineering, University of Iowa, where he is currently a University of Iowa Foundation Distinguished Professor. He served as the Chair of the Department from 1981 to 2000.

Dr. Reddy has published over four hundred papers in the areas of test and design for test of digital VLSI circuits, coding theory and fault-tolerant computing. He is a Fellow of IEEE . He received a Von Humboldt senior Research Fellowship in 1995 and a life time achievement award from VLSI Design Conference. Dr. Reddy has served twice as a guest editor and as an associate editor of the IEEE Transactions on Computers and as an associate editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. He was the technical program chair of the 1989 International Fault-Tolerant Computing Symposium.

This talk is part of the CAS FPGA Talks series.

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• CAS FPGA Talks
• Room 611, EEE

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